The testing and verification of semiconductor chips was a prominent topic at this year’s European Test Systems (ETS) conference, especially in the area of Design-for-Test (DFT) tools and techniques.

Design for testability (DFT) works to make a circuit more testable to ensure that it was manufactured correctly. Alfred Crouch explains the purpose of DFT in his book, Design-For-Test for Digital ICs ...

The use of redundant logic may increase product reliability. Two of the most costly functions that engineering teams developing electronic products perform are verification and test. On the surface, ...

New manufacturing test challenges are raised with SoC technology advances where both test quality and test costs are affected with a direct impact on current Design-For-Test (DFT) methodologies and ...

Detection and monitoring of the yield loss mechanisms and defects in product chips have been a subject of extensive efforts, resulting in multiple useful Design-for-Manufacturing (DFM) and ...

Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...